報(bào)告題目：A Novel Type of Low-Density Parity-Check (LDPC) Code ----Cyclically-Coupled Quasi-Cyclic LDPC Code
主講嘉賓：Prof. Francis C.M. Lau 香港理工大學(xué)
時(shí)間：2016年1月 14 日（周四）下午2:00
地點(diǎn)：深圳大學(xué)南區(qū)基礎(chǔ)實(shí)驗(yàn)樓北座信息工程學(xué)院N710會議室
報(bào)告摘要:
With the growing need of advanced communication technologies, developing superior forward-error correction (FEC) schemes has become imperative. Low-density parity-check (LDPC) block codes have undoubtedly been one the most promising FEC classes recently due to their capability in approaching channel capacity. Quasi-cyclic LDPC (QC-LDPC) codes, having a regularized structure that reduces the encoder/decoder complexities, have further demonstrated the practical value of LDPC codes. It has also been proved that QC-LDPC codes can achieve as excellent error performance as random LDPC codes. With comparable decoder complexities, an LDPC convolutional code generally outperforms its block code counterpart in terms of bit error rate and net coding gain.
In this talk, we propose a new class of QC-LDPC codes, namely cyclically-coupled QC-LDPC (CC-QC-LDPC) codes, and their RAM-based decoder architecture. CC-QC-LDPC codes have a simple structure and are constructed by cyclically-coupling a number of QC-LDPC sub-codes. They can achieve throughput and error performance as excellent as LDPC convolutional codes, but with much lower hardware requirements. They are therefore promising candidates for future generations of communication systems such as long-haul optical communication systems.
嘉賓簡介：
Francis C. M. Lau received BEng(Hons) degree in electronic and electrical engineering and PhD degree from King’s College London, University of London, UK. He is a Professor and Associate Head at the Department of Electronic and Information Engineering, The Hong Kong Polytechnic University, Hong Kong. He is also a Fellow of IET and a Senior Member of IEEE.
His research interests include chaos-based digital communications, channel coding, cooperative networks, wireless sensor networks, applications of complex-network theories, and wireless communications.
He is the co-author of two research monographs --- Chaos-Based Digital Communication Systems (Heidelberg: Springer-Verlag, 2003) and Digital Communications with Chaos: Multiple Access Techniques and Performance Evaluation (Oxford: Elsevier, 2007). He co-holds two US patents related to chaos-based communications and two other US patents related to channel encoders/decoders. He has published over 270 research papers, including over 100 journal publications. Many of them appear in IEEE journals such as IEEE Journal on Selected Areas in Communications, IEEE Sensors Journal, IEEE Transactions on Circuits and Systems I, IEEE Transactions on Circuits and Systems II, IEEE Transactions on Communications, IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Parallel and Distributed Systems, IEEE Transactions on Vehicular Technology, and IEEE Transactions on Wireless Communications. His publications received the “Best Paper Award” at the International Conference on Advanced Technologies for Communications (2011 and 2015) and the “Outstanding Paper Awards” at the International Conference on Advanced Communication Technology (2012 and 2013).
In additional to serving as technical committee program member, session chair and reviewer of many international conferences, he served as an associate editor for several journals, including IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II (2004-05), IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I (2006-07) and IEEE CIRCUITS AND SYSTEMS MAGAZINE (2012-2015). He has been a guest associate editor of INTERNATIONAL JOURNAL AND BIFURCATION AND CHAOS since 2010 and an associate editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II again since 2016. He was also the Chair of Technical Committee on Nonlinear Circuits and Systems, IEEE Circuits and Systems Society from 2012-2013 and the co-track chair of Nonlinear Circuits and Systems, 2010 IEEE International Symposium on Circuits and Systems.
歡迎各位老師和同學(xué)參加。
